1. Field of the Invention
The present invention pertains to a computer system, and more particularly, to an interelement processor associated with a parallel vector processor in said computer system for rapidly processing the elements of a single vector and for storing the results of said processing.
2. Description of the Prior Art
A typical vector processor, such as that shown in FIG. 1, includes a plurality of vector registers, each vector register storing a vector. The vector comprises a plurality of vector elements. A pipeline processing unit is connected to a selector associated with the vector registers for receiving, in sequence, the elements of a first vector from a first vector register and for performing an arithmetic operation on the elements of the first vector to yield a resultant vector. The elements of the resultant vector may be re-stored in corresponding locations of the first vector register or in another vector register.
However, with this configuration, it is necessary to perform operations on each of the elements of a vector in sequence. The time required to complete operations on all 256 elements of a 256 element vector is a function of the cycle time of the pipeline unit per operation on each of the elements.
With increasing sophistication of computer systems, it has become increasingly evident that there is a need to increase the performance of the vector processor portion of the computer system by decreasing the time required to process or perform arithmetic operations on each of the elements of a vector or on each of the corresponding elements of a plurality of vectors stored in the vector registers within the computer system.